Huawei Targets 1.4-Nanometer Chip Performance by 2031 With New Design Architecture
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Huawei's Ascend 910 series AI chips in Hangzhou on May 10, 2026. Photo: VCG
Huawei Technologies Co. expects to match the performance of industry-leading 1.4-nanometer chips by 2031 using a novel design architecture, signaling a major step in bypassing U.S. curbs on its access to advanced manufacturing tools.
He Tingbo, president of the company’s semiconductor division, unveiled the Tau (τ) Scaling Law at an international symposium on Monday. The new theoretical framework focuses on minimizing signal transmission time across vertically stacked chip layers rather than shrinking the physical size of transistors.
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- Huawei expects to match 1.4nm chip performance by 2031 using its Tau Scaling Law and vertical stacking, bypassing US curbs on advanced tools.
- Its upcoming Kirin processors will use LogicFolding to achieve 238M transistors/mm², 41% higher power efficiency, and ~13% faster clock speeds.
- Industry insiders caution the metrics aren't directly comparable to traditional node advancements, though the method reduces power and improves yields.
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Who’s Who
- Huawei Technologies Co., Ltd.
- Huawei Technologies Co. aims to match 1.4-nanometer chip performance by 2031 using its novel Tau Scaling Law and LogicFolding technology. This approach stacks circuits vertically to reduce signal transmission time, bypassing U.S. export controls on advanced manufacturing tools. Upcoming Kirin processors will feature improved efficiency and transistor density.
- Hua Hong Semiconductor Ltd.
- Hua Hong Semiconductor Ltd. is a Chinese semiconductor foundry. Following Huawei's announcement of a novel chip architecture, its shares surged by the maximum daily limit of 20%.
- Semiconductor Manufacturing International Corp.
- Semiconductor Manufacturing International Corp. (SMIC) rallied nearly 19% following Huawei's announcement of a new chip design architecture. This surge reflects market optimism over China's efforts to bypass U.S. export controls through innovative chip packaging, though SMIC itself was not directly mentioned in the technical details.
- Intel Corp.
- In the article, Intel Corp. is referenced for its upcoming 18A node, which matches the transistor density of 238 million per square millimeter achieved by Huawei's new Kirin chip using logic stacking technology. This highlights Intel's advanced manufacturing capabilities amid industry shifts.
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Taiwan Semiconductor Manufacturing Co. (TSMC) is a leading contract chipmaker based in Taiwan. According to the article, TSMC plans to mass-produce 1.4-nanometer chips by 2028. Huawei was cut off from TSMC due to U.S. export controls, prompting its shift to novel chip design.
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What Happened When
- By 2020：
- Huawei's geometric scaling plateaued, prompting a rethink of Moore's Law.
- Since 2020：
- Huawei has mass-produced 381 chips using a new methodology involving vertically stacked circuits.
- May 25, 2026：
- He Tingbo unveiled the Tau Scaling Law at an international symposium, triggering a surge in Chinese semiconductor stocks.
- By 2028：
- TSMC plans to mass-produce 1.4-nanometer chips.
- By 2029：
- Huawei projects maximum clock speeds of 4 gigahertz for Kirin processors using logic stacking.
- By 2031：
- Huawei expects to match the performance of industry-leading 1.4-nanometer chips.
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