Analysis: Huawei’s Chip Design Vision Faces Reality Check
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Huawei Technologies Co. Ltd. recently threw a conceptual bombshell into the global semiconductor industry, unveiling the Tau (τ) Scaling Law as a radical paradigm for chip design.
By shifting from traditional two-dimensional planar scaling to three-dimensional architecture, the Chinese tech giant expects to match the performance of industry-leading 1.4-nanometer chips by 2031 using the new theoretical framework, signaling a major step in bypassing U.S. curbs on its access to advanced manufacturing tools.
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- Huawei unveiled the Tau (τ) Scaling Law, aiming to match 1.4nm chip performance by 2031 through 3D LogicFolding technology.
- Industry leaders Nvidia and TSMC stated this 3D stacking approach has been used for a decade, citing TSMC's 3D Fabric and Intel's Foveros.
- Key challenges include heat dissipation in vertical stacks and yield issues, which previously doomed Intel's Lakefield chip.
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Who’s Who
- Huawei Technologies Co. Ltd.
- Huawei Technologies Co. Ltd. unveiled the Tau (τ) Scaling Law, shifting from 2D to 3D chip architecture to match 1.4nm performance by 2031. President He Tingbo presented the concept, but industry leaders like Nvidia and TSMC noted similar technology has existed for a decade.
- Nvidia Corp.
- Nvidia Corp., led by CEO Jensen Huang, responded indifferently to Huawei's Tau Scaling Law, stating that 3D chip stacking is what the industry has been doing for a decade. Huang acknowledged Huawei's breakthrough but stressed it poses no threat to TSMC, as similar technology has existed in Taiwan for years.
- Taiwan Semiconductor Manufacturing Co. Ltd.
- Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) is a global leader in semiconductor manufacturing. The article notes TSMC deployed its 3D Fabric technology a decade ago, with executives stating that Huawei's recently unveiled Tau Scaling Law and LogicFolding technology have long been standard industry practices, not novel breakthroughs.
- Advanced Micro Devices Inc.
- Based on the article, Advanced Micro Devices Inc. (AMD) commercialized 3D V-Cache technology in 2021, vertically stacking SRAM cache. This highlights AMD's involvement in the industry's shift from 2D to 3D chip architectures, a trend that predates Huawei's recent Tau Scaling Law announcement.
- Intel Corp.
- Intel Corp. has widely adopted its Foveros 3D packaging technology, abandoning planar layouts to integrate different IP modules in a 3D architecture. However, its Lakefield 3D stacking chip failed commercially due to thermal dissipation and cost issues, highlighting challenges in vertical stacking.
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What Happened When
- Around 2016：
- TSMC deployed its 3D Fabric technology.
- By 2021：
- Intel's Lakefield 3D stacking chip quietly quit the market after being used in just two consumer products.
- 2021：
- Advanced Micro Devices Inc. (AMD) commercialized 3D V-Cache technology by vertically stacking SRAM cache.
- By 2026：
- Intel Corp. achieved wide adoption of its Foveros 3D packaging technology.
- In 2026：
- Huawei Technologies Co. Ltd. unveiled the Tau (τ) Scaling Law, expecting to match the performance of 1.4-nanometer chips by 2031.
- In late May 2026：
- Nvidia's CEO Jensen Huang acknowledged Huawei's LogicFolding as a breakthrough for Huawei but stressed it poses no threat to TSMC.
- May 25, 2026：
- He Tingbo, president of Huawei's semiconductor division, unveiled the Tau (τ) Scaling Law at an international symposium.
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